ru.unix.bsd

 
 - RU.UNIX.BSD ------------------------------------------------------------------
 From : Slawa Olhovchenkov                   2:5030/500     15 Nov 2006  17:18:34
 To : All
 Subject : Вести с полей
 -------------------------------------------------------------------------------- 
 

 
 jhb         2006-11-13 21:47:30 UTC
 
   FreeBSD src repository
 
   Modified files:
     sys/dev/acpica       acpi_pcib_acpi.c acpi_pcib_pci.c
     sys/dev/pci          pci.c pci_if.m pci_pci.c pci_private.h
                          pcib_if.m pcib_private.h pcireg.h
                          pcivar.h
   Log:
   First cut at MI support for PCI Message Signalled Interrupts (MSI):
   - Add 3 new functions to the pci_if interface along with suitable wrappers
     to provide the device driver visible API:
     - pci_alloc_msi(dev, int *count) backed by PCI_ALLOC_MSI().  '*count'
       here is an in and out parameter.  The driver stores the desired number
       of messages in '*count' before calling the function.  On success,
       '*count' holds the number of messages allocated to the device.  Also on
       success, the driver can access the messages as SYS_RES_IRQ resources
       starting at rid 1.  Note that the legacy INTx interrupt resource will
       not be available when using MSI.  Note that this function will allocate
       either MSI or MSI-X messages depending on the devices capabilities and
       the 'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables.  Also note
       that the driver should activate the memory resource that holds the
       MSI-X table and pending bit array (PBA) before calling this function
       if the device supports MSI-X.
     - pci_release_msi(dev) backed by PCI_RELEASE_MSI().  This function
       releases the messages allocated for this device.  All of the
       SYS_RES_IRQ resources need to be released for this function to succeed.
     - pci_msi_count(dev) backed by PCI_MSI_COUNT().  This function returns
       the maximum number of MSI or MSI-X messages supported by this device.
       MSI-X is preferred if present, but this function will honor the
       'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables.  This function
       should return the largest value that pci_alloc_msi() can return
       (assuming the MD code is able to allocate sufficient backing resources
       for all of the messages).
   - Add default implementations for these 3 methods to the pci_driver generic
     PCI bus driver.  (The various other PCI bus drivers such as for ACPI and
     OFW will inherit these default implementations.)  This default
     implementation depends on 4 new pcib_if methods that bubble up through
     the PCI bridges to the MD code to allocate IRQ values and perform any
     needed MD setup code needed:
     - PCIB_ALLOC_MSI() attempts to allocate a group of MSI messages.
     - PCIB_RELEASE_MSI() releases a group of MSI messages.
     - PCIB_ALLOC_MSIX() attempts to allocate a single MSI-X message.
     - PCIB_RELEASE_MSIX() releases a single MSI-X message.
   - Add default implementations for these 4 methods that just pass the
     request up to the parent bus's parent bridge driver and use the
     default implementation in the various MI PCI bridge drivers.
   - Add MI functions for use by MD code when managing MSI and MSI-X
     interrupts:
     - pci_enable_msi(dev, address, data) programs the MSI capability address
       and data registers for a group of MSI messages
     - pci_enable_msix(dev, index, address, data) initializes a single MSI-X
       message in the MSI-X table
     - pci_mask_msix(dev, index) masks a single MSI-X message
     - pci_unmask_msix(dev, index) unmasks a single MSI-X message
     - pci_pending_msix(dev, index) returns true if the specified MSI-X
       message is currently pending
   - Save the MSI capability address and data registers in the pci_cfgreg
     block in a PCI devices ivars and restore the values when a device is
     resumed.  Note that the MSI-X table is not currently restored during
     resume.
   - Add constants for MSI-X register offsets and fields.
   - Record interesting data about any MSI-X capability blocks we come
     across in the pci_cfgreg block in the ivars for PCI devices.
 
   Tested on:      em (i386, MSI), bce (amd64/i386, MSI), mpt (amd64, MSI-X)
   Reviewed by:    scottl, grehan, jfv
   MFC after:      2 months
 ... Да, я приципиальный, но не дебил!
 --- GoldED+/BSD 1.1.5
  * Origin:  (2:5030/500)
 
 

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